Talk given at Hackaday Supercon 2023, November 2023.

The Supercon 2022 badge was the Voja4: a hand-assembled kit containing a custom 4-bit retrocomputer of Voja Antonić’s design. If you’ve never seen one in person, the physical interface is unusual and instantly memorable — twelve buttons and twelve LEDs arranged on the front panel, corresponding directly to the 12-bit instruction format. You program it by entering binary. It looks like something out of an alternate 1970s. For Supercon 2023, I gave a talk looking inside the architecture.

A custom ISA on a PIC24

The Voja4 isn’t a standalone CPU — it’s a PIC24 microcontroller emulating a custom 4-bit processor in software. Voja designed the instruction set from scratch, and the choices he made are worth examining. The ISA supports 32 opcodes, derived from 12-bit instructions where four bits encode the opcode and two four-bit fields carry operands or immediate values.

The front panel isn’t incidental to the design — it’s load-bearing. The physical layout of the twelve switches and LEDs maps directly to the instruction word. You’re not looking at a number; you’re looking at the instruction itself, in binary, with your fingers on the bits.

The badge included an 8x16 LED pixel “display”, which is actually just showing you the contents of a few consecutive regions of memory. Even if you’ve never touched assembly before, working with the Voja4 is surprisingly gratifying and it was really neat to see what people created with the badge during the 2022 Supercon.

Is it Turing-complete?

I spent some time on this question, which sounds academic but gets at something real: how much can you actually compute on a machine with 32 opcodes and constrained addressable memory? The instruction set doesn’t include built-in multiplication, which sounds limiting until you work through how to implement it from shifts and adds. The more fundamental constraint is memory — the addressable space is small by design, and that’s the practical ceiling more than the instruction set itself.

The theoretical answer is yes, with appropriate workarounds. I sketched a proposal for extending the addressable space through an external memory interface over serial, which would open up more ambitious programs without fundamentally changing the architecture.

Why it’s worth studying

What I find most interesting about the Voja4 isn’t the nostalgia angle — it’s the clarity. Voja designed a processor that a human can hold in their head all at once: every opcode, every addressing mode, the full instruction encoding. That’s a genuinely rare property, and it makes the Voja4 one of the best tools I know for building an intuition for how processors actually work at the architecture level, before the complexity of modern ISAs gets in the way.

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